Logic Regression on High Dimensional Boolean Space
Note that the sample case will not be included in the cases for final test.
System-level FPGA Routing with Timing Division Multiplexing Technique
LEF/DEF Based Open-Source Global RouterS
Detailed problem descriptions will be announced by January 31, 2019.
check the news
for any update,
for more information, or
for any further question.
Copyright © 2019 CAD Contest. All Rights Reserved.