Logic Regression on High Dimensional Boolean Space
Note that the sample case will not be included in the cases for final test.
The additional 4 cases for BETA test has been uploaded. Note that the executable iogen of case1~case6 are also upgraded with enhanced input format checking inside (without changing the input-output relations).
There will be 10 hidden cases in the final test.
System-level FPGA Routing with Timing Division Multiplexing Technique
LEF/DEF Based Open-Source Global RouterS
ps. ispd18 testcases will be evaluated by ispd18eval; ispd19 testcases will be evaluated by ispd19eval.
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